Markus Stadelmayer, M. Sc.
Lebenslauf
Markus Stadelmayer hat 2017 sein Studium der Elektrotechnik, Elektronik und Informationstechnik an der Friedrich-Alexander-Universität Erlangen-Nürnberg abgeschlossen. In seiner Masterarbeit befasste er sich mit dem Entwurf eines Pipeline Analog-Digital Umsetzers mit Kalibrationsalgorithmus. Seit 2017 arbeit er als wissenschalftlicher Mitarbeiter am Institut für integrierte Schaltungen der JKU Linz an seiner Dissertation. Zur Zeit ist er als Gastwissenschlaftler am Lehrstuhl für Technische Elektronik tätig. Sein Forschungsbereich befasst sich mit dem Entwurf von integrierten Ultra-Low-Power Sendern.
Arbeitsgebiete
- Ultra-Low-Power RFICs
- Mixed-Signal ICs
Publikationen
- Stadelmayer, M., Schumacher, T., Faseth, T., Lang, O. & Pretl, H. (2020, October):
Edge-Combining for QPSK and FSK Modulation Using a Single Delay-Line.
In 2020 Austrochip Workshop on Microelectronics (Austrochip) (pp. 80-85). IEEE. - Stadelmayer, M., Schumacher, T., Faseth, T., & Pretl, H. (2020, June):
A 1.2-V 180-nm CMOS Low-Power Multi-Band Ring Oscillator based Frequency Synthesizer for Edge-Combining Transmitters.
In 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS) (pp. 22-25). IEEE. - Schumacher, T., Stadelmayer, M., Faseth, T., & Pretl, H. (2020, August):
A 1.2-V, 1.8-GHz low-power PLL using a class-F VCO for driving 900-MHz SRD band SC-circuits.
In Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (pp. 37-42). - Stadelmayer, M., Faseth, T., & Pretl, H. (2019, June):
A 0.5-V 180-nm CMOS Switched-Capacitor Temperature Sensor With 319 nJ/measurement.
In 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS) (pp. 1-4). IEEE. - Pretl, H., Faseth, T., Schumacher, T., Stadelmayer, M., Sadjina, S., Schmickl, S., & Hager, E. (2018):
From microwatt to gigabit: challenges of modern radio design.
e & i Elektrotechnik und Informationstechnik, 135(1), 76-82. - Schumacher, T., Stadelmayer, M., Faseth, T., & Pretl, H. (2017, October):
A review of ultra-low-power and low-cost transceiver design.
In 2017 Austrochip Workshop on Microelectronics (Austrochip) (pp. 29-34). IEEE. - Loehr, R., Stadelmayer, M., Roeber, J., Ohnhaeuser, F., & Weigel, R. (2017, September):
A combination of a digital foreground and background calibration for a 16 bit and 200MS/s pipeline analog-to-digital converter.
In 2017 European Conference on Circuit Theory and Design (ECCTD) (pp. 1-4). IEEE.
Human Activity Classification Using mm-Wave FMCW Radar by Improved Representation Learning
ACM Workshop on Millimeter-Wave Networks and Sensing Systems (mmNets) (London, 25. September 2020 - 25. September 2020)
In: Proceedings of the 4th ACM Workshop on Millimeter-Wave Networks and Sensing Systems 2020
DOI: 10.1145/3412060.3418430
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Design of an Integrated Subretinal Implant Using Cellular Neural Networks for Binary Image Generation in a 130 nm BiCMOS Process
IEEE Engineering in Medicine and Biology Conference (EMBC) (Berlin, 23. Juli 2019 - 27. Juli 2019)
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Highly Integrated Low Power Photomultiplier Readout ASIC Comprising Fast ADC to Be Used in the Antarctic Ice
2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) (Orlando, Florida, 20. Januar 2019 - 23. Januar 2019)
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